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(as.info)ARM Options

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Options
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`-mcpu=PROCESSOR[+EXTENSION...]'
     This option specifies the target processor.  The assembler will
     issue an error message if an attempt is made to assemble an
     instruction which will not execute on the target processor.  The
     following processor names are recognized: `arm1', `arm2', `arm250',
     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
     `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
     `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
     `arm8', `arm810', `strongarm', `strongarm1', `strongarm110',
     `strongarm1100', `strongarm1110', `arm9', `arm920', `arm920t',
     `arm922t', `arm940t', `arm9tdmi', `arm9e', `arm946e-r0', `arm946e',
     `arm966e-r0', `arm966e', `arm10t', `arm10e', `arm1020', `arm1020t',
     `arm1020e', `ep9312' (ARM920 with Cirrus Maverick coprocessor),
     `i80200' (Intel XScale processor) and `xscale'.  The special name
     `all' may be used to allow the assembler to accept instructions
     valid for any ARM processor.

     In addition to the basic instruction set, the assembler can be
     told to accept various extension mnemonics that extend the
     processor using the co-processor instruction space.  For example,
     `-mcpu=arm920+maverick' is equivalent to specifying
     `-mcpu=ep9312'.  The following extensions are currently supported:
     `+maverick' and `+xscale'.

`-march=ARCHITECTURE[+EXTENSION...]'
     This option specifies the target architecture.  The assembler will
     issue an error message if an attempt is made to assemble an
     instruction which will not execute on the target architecture.
     The following architecture names are recognized: `armv1', `armv2',
     `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
     `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
     `armv5texp' and `xscale'.  If both `-mcpu' and `-march' are
     specified, the assembler will use the setting for `-mcpu'.

     The architecture option can be extended with the same instruction
     set extension options as the `-mcpu' option.

`-mfpu=FLOATING-POINT-FORMAT'
     This option specifies the floating point format to assemble for.
     The assembler will issue an error message if an attempt is made to
     assemble an instruction which will not execute on the target
     floating point unit.  The following format options are recognized:
     `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
     `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
     `vfp9', `vfpxd', `arm1020t' and `arm1020e'.

     In addition to determining which instructions are assembled, this
     option also affects the way in which the `.double' assembler
     directive behaves when assembling little-endian code.

     The default is dependent on the processor selected.  For
     Architecture 5 or later, the default is to assembler for VFP
     instructions; for earlier architectures the default is to assemble
     for FPA instructions.

`-mthumb'
     This option specifies that the assembler should start assembling
     Thumb instructions; that is, it should behave as though the file
     starts with a `.code 16' directive.

`-mthumb-interwork'
     This option specifies that the output generated by the assembler
     should be marked as supporting interworking.

`-mapcs `[26|32]''
     This option specifies that the output generated by the assembler
     should be marked as supporting the indicated version of the Arm
     Procedure.  Calling Standard.

`-matpcs'
     This option specifies that the output generated by the assembler
     should be marked as supporting the Arm/Thumb Procedure Calling
     Standard.  If enabled this option will cause the assembler to
     create an empty debugging section in the object file called
     .arm.atpcs.  Debuggers can use this to determine the ABI being
     used by.

`-mapcs-float'
     This indicates the the floating point variant of the APCS should be
     used.  In this variant floating point arguments are passed in FP
     registers rather than integer registers.

`-mapcs-reentrant'
     This indicates that the reentrant variant of the APCS should be
     used.  This variant supports position independent code.

`-EB'
     This option specifies that the output generated by the assembler
     should be marked as being encoded for a big-endian processor.

`-EL'
     This option specifies that the output generated by the assembler
     should be marked as being encoded for a little-endian processor.

`-k'
     This option specifies that the output of the assembler should be
     marked as position-independent code (PIC).

`-moabi'
     This indicates that the code should be assembled using the old ARM
     ELF conventions, based on a beta release release of the ARM-ELF
     specifications, rather than the default conventions which are
     based on the final release of the ARM-ELF specifications.