M32R Warnings
-------------
There are several warning and error messages that can be produced by
`as' which are specific to the M32R:
`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
This message is only produced if warnings for explicit parallel
conflicts have been enabled. It indicates that the assembler has
encountered a parallel instruction in which the destination
register of the left hand instruction is used as an input register
in the right hand instruction. For example in this code fragment
`mv r1, r2 || neg r3, r1' register r1 is the destination of the
move instruction and the input to the neg instruction.
`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
This message is only produced if warnings for explicit parallel
conflicts have been enabled. It indicates that the assembler has
encountered a parallel instruction in which the destination
register of the right hand instruction is used as an input
register in the left hand instruction. For example in this code
fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
of the neg instruction and the input to the move instruction.
`instruction `...' is for the M32RX only'
This message is produced when the assembler encounters an
instruction which is only supported by the M32Rx processor, and
the `-m32rx' command line flag has not been specified to allow
assembly of such instructions.
`unknown instruction `...''
This message is produced when the assembler encounters an
instruction which it doe snot recognise.
`only the NOP instruction can be issued in parallel on the m32r'
This message is produced when the assembler encounters a parallel
instruction which does not involve a NOP instruction and the
`-m32rx' command line flag has not been specified. Only the M32Rx
processor is able to execute two instructions in parallel.
`instruction `...' cannot be executed in parallel.'
This message is produced when the assembler encounters a parallel
instruction which is made up of one or two instructions which
cannot be executed in parallel.
`Instructions share the same execution pipeline'
This message is produced when the assembler encounters a parallel
instruction whoes components both use the same execution pipeline.
`Instructions write to the same destination register.'
This message is produced when the assembler encounters a parallel
instruction where both components attempt to modify the same
register. For example these code fragments will produce this
message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
@-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
r3, r4' (Both write to the condition bit)