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(nasm.info)Section B.4.138

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B.4.138. `LGDT', `LIDT', `LLDT': Load Descriptor Tables
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     LGDT mem                      ; 0F 01 /2             [286,PRIV]
     LIDT mem                      ; 0F 01 /3             [286,PRIV]
     LLDT r/m16                    ; 0F 00 /2             [286,PRIV]

   `LGDT' and `LIDT' both take a 6-byte memory area as an operand: they
load a 32-bit linear address and a 16-bit size limit from that area (in
the opposite order) into the `GDTR' (global descriptor table register)
or `IDTR' (interrupt descriptor table register). These are the only
instructions which directly use _linear_ addresses, rather than
segment/offset pairs.

   `LLDT' takes a segment selector as an operand. The processor looks up
that selector in the GDT and stores the limit and base address given
there into the `LDTR' (local descriptor table register).

   See also `SGDT', `SIDT' and `SLDT' (*Note Section B.4.289::).