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(nasm.info)Section B.4.255

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B.4.255. `PSLLx': Packed Data Bit Shift Left Logical
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     PSLLW mm1,mm2/m64             ; 0F F1 /r             [PENT,MMX]
     PSLLW mm,imm8                 ; 0F 71 /6 ib          [PENT,MMX]

     PSLLW xmm1,xmm2/m128          ; 66 0F F1 /r     [WILLAMETTE,SSE2]
     PSLLW xmm,imm8                ; 66 0F 71 /6 ib  [WILLAMETTE,SSE2]

     PSLLD mm1,mm2/m64             ; 0F F2 /r             [PENT,MMX]
     PSLLD mm,imm8                 ; 0F 72 /6 ib          [PENT,MMX]

     PSLLD xmm1,xmm2/m128          ; 66 0F F2 /r     [WILLAMETTE,SSE2]
     PSLLD xmm,imm8                ; 66 0F 72 /6 ib  [WILLAMETTE,SSE2]

     PSLLQ mm1,mm2/m64             ; 0F F3 /r             [PENT,MMX]
     PSLLQ mm,imm8                 ; 0F 73 /6 ib          [PENT,MMX]

     PSLLQ xmm1,xmm2/m128          ; 66 0F F3 /r     [WILLAMETTE,SSE2]
     PSLLQ xmm,imm8                ; 66 0F 73 /6 ib  [WILLAMETTE,SSE2]

     PSLLDQ xmm1,imm8              ; 66 0F 73 /7 ib  [WILLAMETTE,SSE2]

   `PSLLx' performs logical left shifts of the data elements in the
destination (first) operand, moving each bit in the separate elements
left by the number of bits specified in the source (second) operand,
clearing the low-order bits as they are vacated. `PSLLDQ' shifts bytes,
not bits.

   * `PSLLW' shifts word sized elements.

   * `PSLLD' shifts doubleword sized elements.

   * `PSLLQ' shifts quadword sized elements.

   * `PSLLDQ' shifts double quadword sized elements.