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(nasm.info)Section B.4.296

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B.4.296. `SMSW': Store Machine Status Word
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     SMSW r/m16                    ; 0F 01 /4             [286,PRIV]

   `SMSW' stores the bottom half of the `CR0' control register (or the
Machine Status Word, on 286 processors) into the destination operand.
See also `LMSW' (*Note Section B.4.139::).

   For 32-bit code, this would use the low 16-bits of the specified
register (or a 16bit memory location), without needing an operand size
override byte.