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(nasm.info)Section B.4.302

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B.4.302. `STMXCSR': Store Streaming SIMD Extension Control/Status
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     STMXCSR m32                   ; 0F AE /3        [KATMAI,SSE]

   `STMXCSR' stores the contents of the `MXCSR' control/status register
to the specified memory location. `MXCSR' is used to enable
masked/unmasked exception handling, to set rounding modes, to set
flush-to- zero mode, and to view exception status flags. The reserved
bits in the `MXCSR' register are stored as 0s.

   For details of the `MXCSR' register, see the Intel processor docs.

   See also `LDMXCSR' (*Note Section B.4.133::).