B.4.34. `CPUID': Get CPU Identification Code
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CPUID ; 0F A2 [PENT]
`CPUID' returns various information about the processor it is being
executed on. It fills the four registers `EAX', `EBX', `ECX' and `EDX'
with information, which varies depending on the input contents of `EAX'.
`CPUID' also acts as a barrier to serialise instruction execution:
executing the `CPUID' instruction guarantees that all the effects
(memory modification, flag modification, register modification) of
previous instructions have been completed before the next instruction
gets fetched.
The information returned is as follows:
* If `EAX' is zero on input, `EAX' on output holds the maximum
acceptable input value of `EAX', and `EBX:EDX:ECX' contain the
string `"GenuineIntel"' (or not, if you have a clone processor).
That is to say, `EBX' contains `"Genu"' (in NASM's own sense of
character constants, described in *Note Section 3.4.2::), `EDX'
contains `"ineI"' and `ECX' contains `"ntel"'.
* If `EAX' is one on input, `EAX' on output contains version
information about the processor, and `EDX' contains a set of
feature flags, showing the presence and absence of various
features. For example, bit 8 is set if the `CMPXCHG8B' instruction
(*Note Section B.4.31::) is supported, bit 15 is set if the
conditional move instructions (*Note Section B.4.23:: and *Note
Section B.4.72::) are supported, and bit 23 is set if `MMX'
instructions are supported.
* If `EAX' is two on input, `EAX', `EBX', `ECX' and `EDX' all
contain information about caches and TLBs (Translation Lookahead
Buffers).
For more information on the data returned from `CPUID', see the
documentation from Intel and other processor manufacturers.