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(nasm.info)Section B.4.36

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B.4.36. `CVTDQ2PS': Packed Signed INT32 to Packed Single-Precision FP Conversion
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     CVTDQ2PS xmm1,xmm2/mem128     ; 0F 5B /r        [WILLAMETTE,SSE2]

   `CVTDQ2PS' converts four packed signed doublewords from the source
operand to four packed single-precision FP values in the destination
operand.

   The destination operand is an `XMM' register. The source can be
either an `XMM' register or a 128-bit memory location.

   For more details of this instruction, see the Intel Processor
manuals.