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(nasm.info)Section B.4.53

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B.4.53. `CVTTPS2DQ': Packed Single-Precision FP to Packed Signed INT32 Conversion with Truncation
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     CVTTPS2DQ xmm1,xmm2/mem128    ; F3 0F 5B /r     [WILLAMETTE,SSE2]

   `CVTTPS2DQ' converts four packed single-precision FP values in the
source operand to four packed signed doublewords in the destination
operand. If the result is inexact, it is truncated (rounded toward
zero).

   The destination operand is an `XMM' register. The source can be
either an `XMM' register or a 128-bit memory location.

   For more details of this instruction, see the Intel Processor
manuals.