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(nasm.info)Section B.4.63

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B.4.63. `DIVSS': Scalar Single-Precision FP Divide
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     DIVSS xmm1,xmm2/mem32         ; F3 0F 5E /r     [KATMAI,SSE]

   `DIVSS' divides the low-order single-precision FP value in the
destination operand by the low-order single-precision FP value in the
source operand, and stores the single-precision result in the
destination register.

   The destination is an `XMM' register. The source operand can be
either an `XMM' register or a 32-bit memory location.

        dst[0-31]   := dst[0-31] / src[0-31],
        dst[32-127] remains unchanged.