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Whole document tree The Netwide Assembler: NASMThe Netwide Assembler: NASMNext Chapter | Previous Chapter | Contents | Index Chapter 9: Mixing 16 and 32 Bit CodeThis chapter tries to cover some of the issues, largely related to unusual forms of addressing and jump instructions, encountered when writing operating system code such as protected-mode initialisation routines, which require code that operates in mixed segment sizes, such as code in a 16-bit segment trying to modify data in a 32-bit one, or jumps between different-size segments. 9.1 Mixed-Size JumpsThe most common form of mixed-size instruction is the one used when writing a 32-bit OS: having done your setup in 16-bit mode, such as loading the kernel, you then have to boot it by switching into protected mode and jumping to the 32-bit kernel start address. In a fully 32-bit OS, this tends to be the only mixed-size instruction you need, since everything before it can be done in pure 16-bit code, and everything after it can be pure 32-bit. This jump must specify a 48-bit far address, since the target segment is a 32-bit one. However, it must be assembled in a 16-bit segment, so just coding, for example, jmp 0x1234:0x56789ABC ; wrong! will not work, since the offset part of the address will be truncated to
The Linux kernel setup code gets round the inability of
jmp dword 0x1234:0x56789ABC ; right The You can do the reverse operation, jumping from a 32-bit segment to a
16-bit one, by means of the jmp word 0x8765:0x4321 ; 32 to 16 bit If the 9.2 Addressing Between Different-Size SegmentsIf your OS is mixed 16 and 32-bit, or if you are writing a DOS extender, you are likely to have to deal with some 16-bit segments and some 32-bit ones. At some point, you will probably end up writing code in a 16-bit segment which has to access data in a 32-bit segment, or vice versa. If the data you are trying to access in a 32-bit segment lies within the first 64K of the segment, you may be able to get away with using an ordinary 16-bit addressing operation for the purpose; but sooner or later, you will want to do 32-bit addressing from 16-bit mode. The easiest way to do this is to make sure you use a register for the address, since any effective address containing a 32-bit register is forced to be a 32-bit address. So you can do mov eax,offset_into_32_bit_segment_specified_by_fs mov dword [fs:eax],0x11223344 This is fine, but slightly cumbersome (since it wastes an instruction and a register) if you already know the precise offset you are aiming at. The x86 architecture does allow 32-bit effective addresses to specify nothing but a 4-byte offset, so why shouldn't NASM be able to generate the best instruction for the purpose? It can. As in section 9.1, you need only
prefix the address with the mov dword [fs:dword my_offset],0x11223344 Also as in section 9.1, NASM is not fussy
about whether the mov dword [dword fs:my_offset],0x11223344 Don't confuse the mov word [dword 0x12345678],0x9ABC This moves 16 bits of data to an address specified by a 32-bit offset. You can also specify call dword far [fs:word 0x4321] This instruction contains an address specified by a 16-bit offset; it loads a 48-bit far pointer from that (16-bit segment and 32-bit offset), and calls that address. 9.3 Other Mixed-Size InstructionsThe other way you might want to access data might be using the string
instructions ( This is the purpose of NASM's a32 lodsb The prefix forces the addressing size to 32 bits, meaning that
The
o16 push ss o16 push ds This code saves a doubleword of stack space by fitting two segment registers into the space which would normally be consumed by pushing one. (You can also use the |